Internal Architecture

VON-NEUMANN ARCHITECTURE

Microcontrollers using the von-Neumann architecture have only one memory block and one 8-bit data bus. As all data is exchanged through these 8 lines, the bus is overloaded and communication is slow and inefficient. The CPU can either read an instruction or read/write data from/to the memory. Both processes cannot be performed at the same time since instructions and data use the same bus.

HARVARD ARCHITECTURE

Microcontrollers which implement the Harvard architecture have two different data buses. One is 8 bits wide and connects the CPU to RAM. The other consists of 12, 14 or 16 lines and connects the CPU to ROM. Accordingly, the CPU can read an instruction and access data memory at the same time. Since all RAM memory registers are 8 bits wide, all data being exchanged is of the same width. During the writing process, only 8-bit data is included. In other words, all you can change from within the program and all you can deal with is 8 bits wide. All the programs written for these microcontrollers will be stored in the microcontroller internal ROM after being compiled to machine code. However, ROM memory locations are not 8, but 12, 14 or 16 bits wide. The rest of bits 4, 6 or 8, respectively, represents the instruction alone specifying for the CPU what to do with the 8-bit data.